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Proceedings of the IEEE 12th Signal Processing and Communications Applications Conference, SIU 2004, Kusadasi, Turkey, 28 - 30 April 2004, pp.646-648
In hardware applications, digital filters can be realized with integrated circuit design or can be implemented by coding of digital signal processors. They require continuous arithmetic calculations and dissipate high power and occupy a large number of hardware resources. Therefore design of digital filters by considering hardware requirements are important for some hardware critical applications, but there is no clear method for it. Mean field annealing (MFA) is an efficient and deterministic method which can be applied to filter design algorithms. It is computationally less complex when compared to other methods such as simulated annealing and genetic algorithms as they are also efficient in such optimization processes where the search space is broad. This work tries to minimize the hamming distance between successive filter coefficients. The power dissipation of a DSP is reduced when the hamming distance is minimized, since it reduces the switching activity of the processor. The results show that the Hamming distance between the filter coefficients reduces about 60-70 per cent when the Mean Field Annealing method is employed. The next step in this work is to simulate the power dissipation in a specific DSP architecture for the verification of the power minimization. © 2004 IEEE.