Switching activity calculation of VLSI adders

Baran D., Aktan M., Karimiyan H., Oklobdzija V. G.

2009 8th IEEE International Conference on ASIC, ASICON 2009, Changsha, China, 20 - 23 October 2009, pp.46-49 identifier identifier

  • Publication Type: Conference Paper / Full Text
  • Doi Number: 10.1109/asicon.2009.5351611
  • City: Changsha
  • Country: China
  • Page Numbers: pp.46-49
  • Keywords: Digital Circuits, Switching Activity, Energy Consumption, Energy-Delay Estimation
  • Istanbul Medipol University Affiliated: No


Using exact switching activity rates at all internal nodes when calculating energy ofdigital circuits is believed to result in improved accuracy over to the use of average switching activity.We compare the two approaches in the case of the Kogge-Stone adder implemented with Weinberger and Ling addition recurrences. The difference between the two is less than 4%.Further we examined the accuracy of the energy/delay estimation technique when using exact and average switching activities in 65nm. 45nm. 32nm and 22nm technology nodes. Even then the worse case error in estimating energy is under /5% at 22nm technology node f or 64-bit Kogge-Stone adder. The error in delay estimation is less than 6%f or all the nodes. Our fin ding is that using average switching activity does not yield large errors while simplifying the estimation process greatly. ©2009 IEEE.