Z. Wang Et Al. , "Coping with process variations in ultra-low power CMOS analog integrated circuits," Proceedings 2007 IEEE SoutheastCon , Richmond, New Zealand, pp.54, 2007
Wang, Z. Et Al. 2007. Coping with process variations in ultra-low power CMOS analog integrated circuits. Proceedings 2007 IEEE SoutheastCon , (Richmond, New Zealand), 54.
Wang, Z., SAVCI, H. Ş., Griggs, J. D., Dogan, N. S., & ARVAS, E., (2007). Coping with process variations in ultra-low power CMOS analog integrated circuits . Proceedings 2007 IEEE SoutheastCon (pp.54). Richmond, New Zealand
Wang, Zheng Et Al. "Coping with process variations in ultra-low power CMOS analog integrated circuits," Proceedings 2007 IEEE SoutheastCon, Richmond, New Zealand, 2007
Wang, Zheng Et Al. "Coping with process variations in ultra-low power CMOS analog integrated circuits." Proceedings 2007 IEEE SoutheastCon , Richmond, New Zealand, pp.54, 2007
Wang, Z. Et Al. (2007) . "Coping with process variations in ultra-low power CMOS analog integrated circuits." Proceedings 2007 IEEE SoutheastCon , Richmond, New Zealand, p.54.
@conferencepaper{conferencepaper, author={Zheng Wang Et Al. }, title={Coping with process variations in ultra-low power CMOS analog integrated circuits}, congress name={Proceedings 2007 IEEE SoutheastCon}, city={Richmond}, country={New Zealand}, year={2007}, pages={54} }